8.3. Apple //e memory

Here is the schema of a 64K Apple //e memory.

Figure 8-1. Apple //e memory buses

The CPU accesses only the main memory bus. IOU is the I/O Unit.

There is one bank of 64K bytes RAM and several ROM banks :

Here is an explanation of each bus.

8.3.1. Main memory bus

This bus is the visible part of the memory (from the processor point of view). This bus divides memory in four parts :

8.3.2. Language Card bus

Reference : Apple IIe Technical Reference Manual pages 79 to 83 (PDF pp113-117)

Language Card bus is in charge of the upper 12K memory. This space was originally dedicated to Basic and Monitor ROM in 48K Apple ][. On 64K Apples, a new possibility was to address RAM in this space. This feature is used to load alternative languages in memory (like ][+ Integer Basic on a //e).

Read and Write can be switched independently. This allows to write into RAM while ROM is visible. It is quite convenient when setting up the RAM as many low level routines are in ROM (text display, keyboard input...).

As there are 16K available RAM but only a 12K slot, the low 4K ($D000-$FFFF) can address two banks of RAM. The high 8K are always connected to the same RAM.

This bus is driven by the Language Card Unit using LCRAM, LCWRITE and LCBNK2 soft switches.

By default (LCRAM is off, LCWRITE off), the ROM is readable and write requests has no effect.

Write requests are forwarded to RAM if LCWRITE is set. If it is not set, write requests have no effect (like for ROM).

Read requests are forwarded to RAM if LCRAM is set and to ROM if it is not set.

High 8K requests ($E000-$FFFF) are connected to highest 8K of RAM ($E000-$FFFF).

Low 4K requests ($D000-$DFFF) are connected to RAM at $D000-$DFFF if LCBNK2 is set or to RAM at $C000-$CFFF if not.

8.3.3. I/O Rom Bus

Apple //e and later models had more than 12k of ROM. To access the rest of the ROM, the space $C100-$CFFF, usually reserved for peripheral ROM could be used. A window in $C300-$C3FF, corresponding to the 80 column card, can be specifically selected.

This bus is driven by I/O Rom unit using CXROM and C3ROM switches.

If CXROM is on, I/O Rom bus forwards request to the Slot Rom bus (cards ROMs). If CXROM is off, internal ROM is visible.

The C3ROM switch allows to see internal ROM in $C300-$C3FF space whatever the state of CXROM is. This is use to shadow 80 column extension card ROM and use internal routines instead.

8.3.4. Slot ROM Bus

Each expansion card can have 256 bytes of basic ROM, plus a 4K ROM expansion. The basic ROM is visible at $Cn00-$CnFF, where n is the slot number.

Whenever the basic ROM is accessed, the ROM expansion (if any) is selected and becomes visible at $C800-$CFFF. $CFFF is also a soft switch (called CLRROM) that clears the ROM selection.

This is explained in the IIe Reference Manual page 132.

Slot ROM Bus is in charge of forwarding read requests to the right card ROM. Like the Slots unit, it has to be informed of card inserting and removal. Inserting and removing cards

The insert_card method tells the Slot ROM bus that a card has been inserted :

void CSlotRomBus::insert_card(int slot, CMemory *cardRom, CMemory *cardRomExt)

slot is the slot number (1-7). cardRom is the basic ROM of the card and cardRomExt is its ROM expansion.

The remove_card method tells the Slot ROM bus that a card has been removed :

void CSlotRomBus::remove_card(int slot)

slot is the slot number (1-7).